5. Changelog for the Clash project¶
5.1. 1.6.5 Jun 27th 2023¶
Fixed:
Support building with all combinations of specific versions of our dependencies
hashableandprimitive. #2485The Haskell simulation of the PLL lock signal in
Clash.Clocks(used byClash.Intel.ClockGen) is fixed: the signal is now unasserted for the time the reset input is asserted and vice versa, and no longer crashes the simulation. HDL generation is unchanged. The PLL functions now have an additional constraint:KnownDomain pllLock. #2420
Changed:
Export the constructor for the
Wrappingtype in theClash.Num.Wrappingmodule. See #2292
5.2. 1.6.4 Aug 30th 2022¶
Fixed:
Input validation of the used arguments in blackboxes is now complete. #2184
Clash.Annotations.BitRepresentation.Deriving.deriveAnnotationno longer has quadratic complexity in the size of the constructors and fields. #2209Fully resolve type synonyms when deriving bit representations. #2209
Disregard ticks when determining whether terms are shared. Fixes #2233.
The blackbox parser will make sure it fully parses its input, and report an error when it can’t. #2237
Wrap ~ARG[n] in parentheses. Fixes #2213
The VHDL shift primitives no longer generate bound check failures. Fixes #2215
Evaluator fails impredicative type instantiation of error values #2272
Fix out of bound errors in toEnum/fromSLV for sum types #2220
Netlist generation fails for certain uses of GADTs #2289
The documentation for
ANN TestBenchhad it backwards; it now correctly indicates the annotation is on the test bench, not the device under test. #1750
Fixes with minor changes:
reduceXornow produces a result if the argument has undefined bits instead of throwing anXException(the result is an undefined bit).reduceAndandreduceOralready always produced a result. #2244
Added:
Support for symbols in types while deriving bit representations. #2209
Support for promoted data types while deriving bit representations. #2209
scanlParandscanrParin Clash’s Prelude, as well as theRTreeversionstscanlandtscanr. These variants ofscanl1andscanr1compile to a binary tree of operations, with a depth ofO(log(n))(nbeing the length of the vector) rather than a depth ofnforscanl1andscanr1. #2177The GADT constructors for
RTree(RLeafandRBranch) are now exported directly in addition to the patternsLRandBR. #2177Added the
~ISSCALARtemplate which can be used to check if an argument is rendered to a scalar in HDL. #2184Added support for records and infix constructors when using
Clash.Annotations.BitRepresentation.Deriving.deriveAnnotation. #2191Clash now contains instances for
ShowX,NFDataXandBitPackon the newtypes from the Data.Functor modules (Identity,Const,Compose,ProductandSum). #2218
5.3. 1.6.3 Apr 7th 2022¶
Fixed:
Handle
~ISUNDEFINEDhole in black boxes forBitVectorand for product types. This means that with-fclash-aggressive-x-optimization-blackboxes, resets are now omitted for undefined reset values of such types as well. #2117The
alteraPllprimitive was unusable since commitd325557750(release v1.4.0), it now works again. #2136Simulation/Synthesis mismatch for X-exception to undefined bitvector conversion #2154
The VHDL blackbox for
Signed.fromIntegercan now handle anyNetlist Expras input #2149Clash no longer escapes extended identifiers when rendering SDC files. #2142
The types defined in
clash-prelude-hedgehognow come withShowinstances #2133Extreme values are now generated from the input range instead of the type’s bounds #2138
Internal change:
5.4. 1.6.2 Feb 25th 2022¶
Fixed:
Clash now compiles for users of Clang - i.e., all macOS users.
The
trueDualPortBlockRammodel did not accurately simulate concurrent active ports, thus causing a Haskell/HDL simulation mismatch forasyncFIFOSynchronizer.trueDualPortBlockRamHaskell/HDL simulation mismatch for port enable.Sometimes
trueDualPortBlockRamswapped the names of the ports in exception messages. #2102The evaluator rule for unpack{Float,Double}# are now corrected to return boxed float and double instead of unboxed literals. #2097
Changed:
The
trueDualPortBlockRammodel now only models read/write conflicts for concurrent active portsThe
trueDualPortBlockRammodel now models write/write conflicts for concurrent active ports
5.5. 1.6.1 Feb 11th 2022¶
Changed:
We accidentally released
v1.6.0with the Cabal flagmultiple-hiddenenabled. This is an experimental feature, supposed to be disabled by default for releases.v1.6.1disables it again.
Added:
Clash.Class.HasDomain.TryDomaininstances for Clash sized types
5.6. 1.6.0 Feb 10th 2022¶
Added:
Clash.Class.Counter: a class that defines a odometer-style supercounter. #1763isLikefunction for BitPack types. #1774‘seqErrorX’ for catching both
XExceptionandErrorCall. #1774Clash.Explicit.BlockRam.File.memFile, a function for creating the contents of the data files this blockRAM uses. Can also be imported fromClash.Prelude.BlockRam.File,Clash.Prelude.ROM.FileandClash.Explicit.ROM.File. #1840Support for Yosys compatible SVA to
Clash.Verification. This enables formal verification using SymbiYosis for Verilog and SystemVerilog. #1798Clash.Explicit.Signal.Delayed.forward, a function that can be used to retime aDSignalinto the future without applying any logic. #1882Clash.Signal.andEnableis theHiddenEnableversion ofClash.Explicit.Signal.andEnable(formerly known asenable) #1849runUntil, a function to sample a signal until it returns a value that satisfies the user-given test. It is a convenience function that, among others, allow easy running of atestBenchstyle function in Haskell simulation, logging assertion failures to stderr. #1940Support for true dual ported block ram through
Clash.Prelude.BlockRam.trueDualPortBlockRamandClash.Explicit.BlockRam.trueDualPortBlockRam. #1726 #1975clash-{prelude,lib}-hedgehogpackages which provide generators for types inclash-preludeandclash-lib. The former is published on Hackage. #1976Clash now contains black boxes which are verilator compatible. When running with
--verilogor--systemveriloga C++ shim is automatically produced which can be used to quickly generate a verilated executable. Users who wish to interact with verilator simulations are recommended to use clashilator. #2019Support for YAML blackboxes. Clash will now pickup on files with a
.primitives.yamlextension. While we recommend upgrading your primitive files to the new format, old style primitives are still supported. We’ve included a tool to automatically upgrade your JSON files, see #2037MemBlob: a datastructure for efficient constants, typically used for initializing memories. #2041
Fixed:
BlockRam simulation is now less strict. #1458
Don’t overflow VHDL’s integer type when addressing RAM/ROM in simulation.Addresses are masked to 32 bits to be sure to keep it within the simulator’s range. #1875
showonBitVector 0no longer results in an empty string. #1785Clash now preserves transfinite floating numbers (NaN, Infinity) when packing/unpacking #1803
SynthesisAnnotations can now be defined in type synoynms without being excluded from the generated HDL #1771Manifest files now correctly list bidirectional ports as “inout” rather than “in” #1843
div/rem/modnow avoid division by zero during VHDL simulation. Due to the use of concurrent statements, even unreachable code would previously result in simulation error #1873Don’t overflow the range of VHDL’s natural type in shift/rotate, leading to simulation issues. Shift now saturates to a 31-bit shift amount. For rotate, in simulation only, the rotate amount is modulo the word width of the rotated value #1874
shiftLfor Clash datatypes does not cause a crash anymore when running Clash code with a really large shift amount #1874VHDL generated for
Signed.fromIntegernow truncates, like the Clash simulation, when the result is smaller than the argument #1874Clash now preserves boolean combinatorial logic better when generating HDL #1881
validfield ofTemplateFunctionis now checked for includes #1945Clash now generates clock generators that ensure that the amount of time between simulation start and the first active edge of the clock is equal to (/or longer than/) the period of the clock. The first active edges of the clocks do still occur simultaneously. #2001
Expected values in assert become undefined when using
-fclash-compile-ultra#2040toEnum/fromEnumon sized types is now less eager to report warnings about integer functions being used #2046
Changed:
Clash.Verification.PrettyPrintershas been moved from clash-prelude to toClash.Verification.Prettyinclash-lib. #1798RAM/ROM functions: They now throw
XExeceptionfor out-of-bounds address inputs, so this condition no longer aborts simulation. #1875Vec’s show instance now generates valid Haskell. #1776ShowXand its functions now produce valid Haskell #1782bLitnow infers the size of the generated BitVector from the string given to it. This means you don’t have to give it an explicit type signature anymore. This does slightly modify the syntax needed to invokebLit. E.g.,$$(bLit "00..1") :: BitVector 5should be rewritten as$(bLit "00..1"). If you relied on the size inference, wrap the new invocation inresize. For example:resize $(bLit "00..1"). #1784NumericUnderscoresis now enabled by default inclash,clashi, and starter projects using Clash >=1.6. #1785Showinstance ofBitVectornow includes a0bprefix, making it a copyable expression for fully defined vectors. #1785blockRamusesSTArrayas the underlying representation to improve simulation performance #1878asyncRomnow throwsXExceptionfor out-of-bounds addressing, no longer aborting simulation #1878Clash now renders ADTs with all zero-width fields as enumerations in VHDL #1879
A warning about possible hard-to-debug issues has been added to the
Clash.Signaldocumentation on hidden clocks, resets, and enables, in the form of the section named “Monomorphism restriction leads to surprising behavior” #1960Clash.Explicit.Testbench.outputVerifierandoutputVerifierBitVectornow emit a warning if they are used improperly. This situation only arises when they are used in synthesized code rather than a test bench context. When the clock domainscircuitDomandtestDomare two different domains, the clock crossing insideoutputVerifieris only suitable inside a test bench, not inside a synthesized circuit. Clash now emits a warning for this case. #1931resetSynchronizernow no longer takes anEnableargument. The argument was already marked for removal and was ignored. #1964Clash can now compile multiple entities concurrently, providing speedups to designs with multiple entities to build #2034
All
asyncRamvariants andasyncFIFOSynchronizernow require that the data has anNFDataXinstance. #2055Clash now respects the
-Werroroption from GHC #2066asyncFIFOSynchronizernow uses the synchronous dual-ported RAMtrueDualPortBlockRam, where it previously used a dual-ported RAM with an asynchronous read portasyncRam. With this change it’s nearly guaranteed thatasyncFIFOSynchronizeractually synthesizes to a circuit that uses the dual-ported RAMs found on most FPGAs. #2083
Deprecated:
The function
Clash.Explicit.Signal.enableis renamed toandEnableand the existing name deprecated #1849‘-fclash-float-support’: it is now on by default and can’t be turned off. #2048
Removed:
GHC 8.4 is no longer supported. Users should upgrade to at least GHC 8.6. #1762
Internal changes:
clash-libnow usesData.Monoid.Apinstead ofData.Semigroup.Monad.Mon. This means users defining primitives withTemplateFunctionwill need to replaceMon/getMonwithAp/getAp. #1835Clash now supports more expressive debug options at the command line #1800.
Added
zeroWidthSpectransformation #1891Added
collapseRHSNoopsinlining stage andWorkIdentityconstructor #1896Added
HasTypeandInferTypeclasses for getting / inferring core types from data representing some typed “thing” #1915Added
HasFreeVarsclass for getting free variables from data “containing” variables #1917Added the primitive equality type (
~#) toClash.Core.TysPrim. In order to make this change,undefinedTyandunsafeCoerceTywere moved fromClash.Core.TypetoClash.Core.Util. #1955Clash now keeps information about which let bindings are recursive from GHC core. This can be used to avoid performing free variable calculations, or sorting bindings in normalization. #1980 #2000
Manifest files now use SHA256 for a cache invalidation digest #1985
5.7. 1.4.7 Jan 30th 2022¶
Fixed:
Clash now shows days in time strings for compile runs which take longer than a day #1989.
Types defined in the package head are no longer qualified in the package body when rendering VHDL #1996.
asyncRamwith different read and write clocks no longer produce the wrong results in Haskell simulation. #2031Clash.Explicit.RAM.asyncRam#Haskell simulation incorrectly treated an undefined write enable as asserted. It now causes an undefined value to be written instead. This problem did not propagate to the otherasyncRamfunctions, where the same condition would simultaneously lead to an undefined write address, which would be handled correctly. This problem also only affects Haskell simulation, not the generated HDL. #2031Clash.Explicit.BlockRam.blockRam#andClash.Explicit.BlockRam.File.blockRamFile#Haskell simulation incorrectly treated an undefined write enable as asserted. It now causes an undefined value to be written instead. This problem did not propagate to the otherblockRamfunctions, where the same condition would simultaneously lead to an undefined write address, which would be handled correctly. This problem also only affects Haskell simulation, not the generated HDL.(#2054)
Internal changes:
Removed instances of
Hashable TermandHashable Type#1986Added structural equality on
Term(Clash.Core.Subst.eqTerm) andType(Clash.Core.Subst.eqType)
Internal fixes:
Enable used to be a
Boolin the Blackbox DSL, so we could useboolToBit. However it now has its own type in the DSL (Enable domainName), so we’ve added a new conversion function in order to convert it to a Bool.
5.8. 1.4.6 Oct 26th 2021¶
Fixed:
5.9. 1.4.5 Oct 13th 2021¶
Changed:
clash-libnow supports prettyprinter 1.7
Documentation:
The documentation on hidden clocks, resets, and enables has been corrected and extended in
Clash.Signal.
5.11. 1.4.3 Aug 8th 2021¶
Fixed:
5.12. 1.4.2 May 18th 2021¶
Fixed:
Erroneous examples in
Clash.Annotation.TopEntitydocumentation #646 and #654unconcatcannot be used as initial/reset value for aregister#1756showXnow doesn’t crash if a spine of aVecis undefined~ISACTIVEENABLEin blackboxes works again, and now acts onSignal dom Boolin addition toEnable dom. Since #1368, enable lines were always generated even if they were known to be always enabled. Fixes #1786.clash –show-options now shows -fclash-* options in GHC 9.0 #1787
makeRecursiveGroupsnow correctly identifies mutual recursion between global binders (#1796).
5.13. 1.4.1 April 6th 2021¶
Fixed:
Broken VHDL primitive template for setSlice# #1715
Unable to reduce nested type families #1721
DEC transformation fails for functions applied to more than 62 arguments #1669
Erroneous examples in BlockRam.File and ROM.File documentation #1608
Blackboxes of
Clash.Sized.Vectorfunctions error on vectors containingClocks,Reset, orEnable#1606Clash.Signal.Delayed.delayIcannot be reset, theHiddenResetconstraint was unintentional. Asserting its reset has never worked. Removed the constraint #1739.Annotate attributes cannot use type families #1742
Changed:
Clash.Prelude.ROM.File.romFilenow takes anEnum addr => addras address argument, making it actually useful. #407
5.14. 1.4.0 March 12th 2021¶
Highlighted changes (repeated in other categories):
Clash no longer disables the monomorphism restriction. See #1270, and mentioned issues, as to why. This can cause, among other things, certain eta-reduced descriptions of sequential circuits to no longer type-check. See #1349 for code hints on what kind of changes to make to your own code in case it no longer type-checks due to this change.
Type arguments of
Clash.Sized.Vector.foldswapped: beforeforall a n . (a -> a -> a) -> Vec (n+1) a -> a, afterforall n a . (a -> a -> a) -> Vec (n+1) a. This makes it easier to usefoldin a1 <= ncontext so you can “simply” dofold @(n-1)Fixednow obeys the laws forEnumas set out in the Haskell Report, and it is now consistent with the documentation for theEnumclass on Hackage. AsFixedis alsoBounded, the rule in the Report thatsucc maxBoundandpred minBoundshould result in a runtime error is interpreted as meaning thatsuccandpredresult in a runtime error whenever the result cannot be represented, not merely forminBoundandmaxBoundalone.Primitives should now be stored in
*.primitivesfiles instead of*.json. While primitive files very much look like JSON files, they’re not actually spec complaint as they use newlines in strings. This has recently been brought to our attention by Aeson fixing an oversight in their parser implementation. We’ve therefore decided to rename the extension to prevent confusion.
Fixed:
Result of
Clash.Class.Exp.(^)has enough bits in order to deal withx^0.Resizes to
Signed 0(e.g.,resize @(Signed n) @(Signed 0)) don’t throw an error anymoresatMulnow correctly handles arguments of typeIndex 2Clash.Explicit.Reset.resetSynchronizernow synchronizes on synchronous domains too #1567.Clash.Explicit.Reset.convertReset: now converts synchronous domains too, if necessary #1567.inlineWorkFreenow never inlines a topentity. It previously only respected this invariant in one of the two cases #1587.Clash now reduces recursive type families #1591
Primitive template warning is now retained when a
PrimitiveGuardannotation is present #1625signumandRealFracforFixednow give the correct results.Fixed a memory leak in register when used on asynchronous domains. Although the memory leak has always been there, it was only triggered on asserted resets. These periods are typically short, hence typically unnoticable.
createDomainwill not override user definitions of types, helping users who strive for complete documentation coverage [#1674] https://github.com/clash-lang/clash-compiler/issues/1674fromSNatis now properly constrained #1692As part of an internal overhaul on netlist identifier generation #1265:
Clash no longer produces “name conflicts” between basic and extended identifiers. I.e.,
\x\andxare now considered the same variable in VHDL (likewise for other HDLs). Although the VHDL spec considers them distinct variables, some HDL tools - like Quartus - don’t.Capitalization of Haskell names are now preserved in VHDL. Note that VHDL is a case insensitive languages, so there are measures in place to prevent Clash from generating both
FooandfOO. This used to be handled by promoting every capitalized identifier to an extended one and wasn’t handled for basic ones.Names generated for testbenches can no longer cause collisions with previously generated entities.
Names generated for components can no longer cause collisions with user specified top entity names.
For (System)Verilog, variables can no longer cause collisions with (to be) generated entity names.
HO blackboxes can no longer cause collisions with identifiers declared in their surrounding architecture block.
Changed:
Treat enable lines specially in generated HDL #1171
Signed,Unsigned,SFixed, andUFixednow correctly implement theEnumlaw specifying that the predecessor ofminBoundand the successor ofmaxBoundshould result in an error #1495.Fixednow obeys the laws forEnumas set out in the Haskell Report, and it is now consistent with the documentation for theEnumclass on Hackage. AsFixedis alsoBounded, the rule in the Report thatsucc maxBoundandpred minBoundshould result in a runtime error is interpreted as meaning thatsuccandpredresult in a runtime error whenever the result cannot be represented, not merely forminBoundandmaxBoundalone.Type arguments of
Clash.Sized.Vector.foldswapped: beforeforall a n . (a -> a -> a) -> Vec (n+1) a -> a, afterforall n a . (a -> a -> a) -> Vec (n+1) a. This makes it easier to usefoldin a1 <= ncontext so you can “simply” dofold @(n-1)Moved
Clash.Core.EvaluatorintoClash.GHCand provided generic interface inClash.Core.Evalautor.Types. This removes all GHC specific code from the evaluator in clash-lib.Clash no longer disables the monomorphism restriction. See #1270, and mentioned issues, as to why. This can cause, among other things, certain eta-reduced descriptions of sequential circuits to no longer type-check. See #1349 for code hints on what kind of changes to make to your own code in case it no longer type-checks due to this change.
Clash now generates SDC files for each topentity with clock inputs
deepErrorXis now equal toundefined#, which means that instead of the whole BitVector being undefined, its individual bits are. This makes sure bit operations are possible on it. #1532From GHC 9.0.1 onwards the following types:
BiSignalOut,Index,Signed,Unsigned,File,Ref, andSimIOare all encoded asdatainstead ofnewtypeto work around an issue where the Clash compiler can no longer recognize primitives over these types. This means you can no longer useData.Coerce.coerceto coerce between these types and their underlying representation.Signals on different domains used to be coercable because the domain had a type role “phantom”. This has been changed to “nominal” to prevent accidental, unsafe coercions. #1640
Size parameters on types in Clash.Sized.Internal.* are now nominal to prevent unsafe coercions. #1640
hzToPeriodnow takes aRatio Naturalrather than aDouble. It rounds slightly differently, leading to more intuitive results and satisfying the requested change in #1253. Clash expresses clock rate as the clock period in picoseconds. If picosecond precision is required for your design, please use the exact method of specifying a clock period rather than a clock frequency.periodToHznow results in aRatio NaturalcreateDomaindoesn’t override existing definitions anymore, fixing #1674Manifest files are now stored as
clash-manifest.jsonManifest files now store hashes of the files Clash generated. This allows Clash to detect user changes on a next run, preventing accidental data loss.
Primitives should now be stored in
*.primitivesfiles. While primitive files very much look like JSON files, they’re not actually spec complaint as they use newlines in strings. This has recently been brought to our attention by Aeson fixing an oversight in their parser implementation. We’ve therefore decided to rename the extension to prevent confusion.Each binder marked with a
SynthesizeorTestBenchpragma will be put in its own directory under their fully qualified Haskell name. For example, two bindersfooandbarin moduleAwill be synthesized inA.fooandA.bar.Clash will no longer generate vhdl, verilog, or systemverilog subdirectories when using
-fclash-hdldir.Data.Kind.Typeis now exported fromClash.Prelude#1700
Added:
Support for GHC 9.0.1
Clash.Signal.sameDomain: Allows user obtain evidence whether two domains are equal.xToErrorCtx: makes it easier to track the origin ofXExceptionwherepackwould hide them #1461Additional field with synthesis attributes added to
InstDeclinClash.Netlist.Types#1482Data.Ix.Ixinstances forSigned,Unsigned, andIndex#1481 #1631Added
nameHintto allow explicitly naming terms, e.g.Signals.Checked versions of
resize,truncateB, andfromIntegral. Depending on the typeresize,truncateB, andfromIntegraleither yield anXExceptionor silently perform wrap-around if its argument does not fit in the resulting type’s bounds. The added functions check the bound condition and fail with an error call if the condition is violated. They do not affect HDL generation. #1491HasBiSignalDefault: constraint to Clash.Signal.BiSignal,pullUpModegives access to the pull-up mode. #1498Match patterns to bitPattern #1545
Non TH
fromListandunsafeFromListfor Vec. These functions allow Vectors to be created from a list without needing to use template haskell, which is not always desirable. The unsafe version of the function does not compare the length of the list to the desired length of the vector, either truncating or padding with undefined if the lengths differ.Clash.Explicit.Reset.resetGlitchFilter: filters glitchy reset signals. Useful when your reset signal is connected to sensitive actuators.Clash can now generate EDAM for using Edalize. This generates edam.py files in all top entities with the configuration for building that entity. Users still need to edit this file to specify the EDA tool to use, and if necessary the device to target (for Quartus, Vivado etc.). #1386
-fclash-aggressive-x-optimization-blackboxes: when enabled primitives can detect undefined values and change their behavior accordingly. For example, ifregisteris used in combination with an undefined reset value, it will leave out the reset logic entirely. Related issue: #1506.Automaton-based interface to simulation, to allow interleaving of cyle-by-cycle simulation and external effects #1261
New internal features:
constructProductanddeconstructProductinClash.Primitives.DSL. Liketupleanduntuple, but on arbitrary product types.Support for multi result primitives. Primitives can now assign their results to multiple variables. This can help to work around synthesis tools limits in some cases. See #1560.
Added a rule for missing
Intcomparisons inGHC.Classesin the compile time evaluator. #1648Clash now creates a mapping from domain names to configurations in
LoadModules. #1405The convenience functions in
Clash.Primitives.DSLnow take a list of HDLs, instead of just one.Clash.Netlist.Idoverhauls the way identifiers are generated in the Netlist part of Clash.Added
defaultWithActionto Clash-as-a-library API to work around/fix issues such as #1686Manifest files now list files and components in an reverse topological order. This means it can be used when calling EDA tooling without causing compilation issues.
Deprecated:
Clash.Prelude.DataFlow: see #1490. In time, its functionality will be replaced by clash-protocols.
Removed:
The deprecated function
freqCalchas been removed.
5.15. 1.2.5 November 9th 2020¶
Fixed:
The normalizeType function now fully normalizes types which require calls to reduceTypeFamily #1469
flogBaseSNat,clogBaseSNatandlogBaseSNatprimitives are now implemented correctly.Previously these primitives would be left unevaluated causing issues as demonstrated in #1479Specializing on functions with type family arguments no longer fails #1477
satSucc,satPredcorrectly handle “small types” such asIndex 1.msbno longer fails on values larger than 64 bitsundefinedcan now be used as a reset value ofautoReg@Maybe#1507Signal’s
fmapis now less strict, preventing infinite loops in very specific situations. See #1521Clash now uses correct function names in manifest and sdc files #1533
Clash no longer produces erroneous HDL in very specific cases #1536
Usage of
foldinside other HO primitives (e.g.,map) no longer fails #1524
Changed:
Due to difficulties using
resetSynchronizerwe’ve decided to make this function always insert a synchronizer. See: #1528.
5.16. 1.2.4 July 28th 2020¶
Changed:
Relaxed upper bound versions of
aesonanddlist, in preparation for the new Stack LTS.Reverted changes to primitive definitions for ‘zipWith’, ‘map’, ‘foldr’, and ‘init’ introduced in 1.2.2. They have shown to cause problems in very specific circumstances.
5.17. 1.2.3 July 11th 2020¶
Changed:
Upgrade to nixos 20.03. Nix and snap users will now use packages present in 20.03.
Added:
instance Monoid a => Monoid (Vec n a)instance Text.Printf(Index)instance Text.Printf(Signed)instance Text.Printf(Unsigned)
Fixed:
Clash renders incorrect VHDL when GHCs Worker/Wrapper transformation is enabled #1402
Minor faults in generated HDL when using annotations from
Clash.Annotations.SynthesisAttributesCabal installed through Snap (
clash.cabal) can now access the internet to fetch pacakges. [#1411]https://github.com/clash-lang/clash-compiler/issues/1411Generated QSys file for
altpllincompatible with Quartus CLI (did work in Quartus GUI)Clash no longer uses component names that clash with identifiers imported from:
IEEE.STD_LOGIC_1164.all
IEEE.NUMERIC_STD.all
IEEE.MATH_REAL.all
std.textio.all when generating VHDL. See https://github.com/clash-lang/clash-compiler/issues/1439.
5.18. 1.2.2 June 12th 2020¶
Changed:
The hardwired functions to unroll primitive definitions for ‘zipWith’, ‘map’, ‘foldr’, and ‘init’ have been changed to only unroll a single step, whereas they would previously unroll the whole definition in one step. This allows Clash to take advantage of the lazy nature of these functions, in turn speeding up compilation speeds significantly in some cases. Part of PR 1354.
Added:
Support for GHC 8.10
Ability to load designs from precompiled modules (i.e., stored in a package database). See #1172
Support for ‘-main-is’ when used with
--vhdl,--verilog, or--systemverilogA partial instance for
NFDataX (Signal domain a)
Fixed:
Clash’s evaluator now inlines work free definitions, preventing situations where it would otherwise get stuck in an infinite loop
caseCondoesn’t apply type-substitution correctly #1340Clash generates illegal SystemVerilog slice #1313
Fix result type of head and tail Verilog blackboxes #1351
Certain recursive let-expressions in side a alternatives of a case-expression throw the Clash compiler into an infinite loop #1316
Fixes issue with one of Clash’s transformations,
inlineCleanup, introducing free variables #1337Fails to propagate type information of existential type #1310
Certain case-expressions throw the Clash compiler into an infinite loop #1320
Added blackbox implementation for ‘Clash.Sized.Vector.iterateI’, hence making it usable as a register reset value #1240
iterateanditerateIcan now be used in reset values #1240Prim evaluation fails on undefined arguments #1297
Missing re-indexing in (Un)Signed fromSLV conversion #1292
VHDL: generate a type qualification inside ~TOBV, fixes #1360
5.19. 1.2.1 April 23rd 2020¶
Changed:
Treat
Signed 0,Unsigned 0,Index 1,BitVector 0as unit. In effect this means that ‘minBound’ and ‘maxBound’ return 0, whereas previously they might crash #1183Infix use of
deepseqXis now right-associative
Added:
Add ‘natToInteger’, ‘natToNatural’, and ‘natToNum’. Similar to ‘snatTo*’, but works solely on a type argument instead of an SNat.
Clash.Sized.Vector.unfoldrandClash.Sized.Vector.unfoldrIto construct vectors from a seed valueAdded NFDataX instances for
Data.Monoid.{First,Last}
Fixed:
The Verilog backend can now deal with non-contiguous ranges in custom bit-representations.
Synthesizing BitPack instances for type with phantom parameter fails #1242
Synthesis of
fromBNat (toBNat d5)failed due tounsafeCoercecoercing fromAnyMemory leak in register primitives #1256
Illegal VHDL slice when projecting nested SOP type #1254
Vivado VHDL code path (
-fclash-hdlsyn Vivado) generates illegal VHDL #1264
5.20. 1.2.0 March 5th 2020¶
As promised when releasing 1.0, we’ve tried our best to keep the API stable. We think most designs will continue to compile with this new version, although special care needs to be taken when using:
Use inline blackboxes. Instead of taking a single HDL, inline primitives now take multiple. For example,
InlinePrimitive VHDL ".."must now be written asInlinePrimitive [VHDL] "..".Use the
Enuminstance forBitVector,Index,Signed, orUnsigned, as they now respect theirmaxBound. See #1089.
On top of that, we’ve added a number of new features:
makeTopEntity: Template Haskell function for generating TopEntity annotations. See the documentation on Haddock for more information.Clash.Explicit.SimIO: ((System)Verilog only) I/O actions that can be translated to HDL I/O. See the documentation on Haddock for more information.Clash.Class.AutoReg: A smart register that improves the chances of synthesis tools inferring clock-gated registers, when used. See the documentation on Haddock for more information.
The full list of changes follows. Happy hacking!
New features (API):
Clash.Class.Paritytype class replaces Preludeoddandevenfunctions due to assumptions that don’t hold for Clash specific numerical types, see #970.NFDataX.ensureSpine, see #748makeTopEntityTemplate Haskell function for generating TopEntity annotations intended to cover the majority of use cases. Generation failures should either result in an explicit error, or a valid annotation of an emptyPortProduct. Any discrepancy between the shape of generated annotations and the shape of the Clash compiler is a bug. See #795. Known limitations:Type application (excluding
Signals and:::) is best effort:Data types with type parameters will work if the generator can discover a single relevant constructor after attempting type application.
Arbitrary explicit clock/reset/enables are supported, but only a single
HiddenClockResetEnableconstraint is supported.Data/type family support is best effort.
Added
Bundle ((f :*: g) a)instanceAdded
NFDataX CUShortinstanceClash’s internal type family solver now recognizes
AppendSymbolandCmpSymbolAdded
Clash.Magic.suffixNameFromNat: can be used in cases wheresuffixNameis too slowAdded
Clash.Class.AutoReg. Improves the chances of synthesis tools inferring clock-gated registers, when used. See #873.Clash.Magic.suffixNameP,Clash.Magic.suffixNameFromNatP: enable prefixing of name suffixesAdded
Clash.Magic.noDeDup: can be used to instruct Clash to /not/ share a function between multiple branchesA
BitPack aconstraint now implies aKnownNat (BitSize a)constraint, so you won’t have to add it manually anymore. See #942.Clash.Explicit.SimIO: ((System)Verilog only) I/O actions that can be translated to HDL I/O; useful for generated test benches.Export
Clash.Explicit.Testbench.assertBitVector#888Add
Clash.Prelude.Testbench.assertBitVectorto achieve feature parity withClash.Explicit.Testbench. #891Add
Clash.XException.NFDataX.ensureSpine#803Add
Clash.Class.BitPack.bitCoerceMap#798Add
Clash.Magic.deDup: instruct Clash to force sharing an operator between multiple branches of a case-expressionInlinePrimitivecan now support multiple backends simultaneously #425Add
Clash.XException.hwSeqX: render declarations of an argument, but don’t assign it to a result signalAdd
Clash.Signal.Bundle.TaggedEmptyTuple: allows users to emulate the pre-1.0 behavior of “Bundle ()”. See #1100
New features (Compiler):
#961: Show
-fclash-*Options inclash --show-options
New internal features:
#918: Add X-Optimization to normalization passes (-fclash-aggressive-x-optimization)
#821: Add
DebugTry: print name of all tried transformations, even if they didn’t succeed#856: Add
-fclash-debug-transformations: only print debug info for specific transformations#911: Add ‘RenderVoid’ option to blackboxes
#958: Prefix names of inlined functions
#947: Add “Clash.Core.TermLiteral”
#887: Show nicer error messages when failing in TH code
#884: Teach reduceTypeFamily about AppendSymbol and CmpSymbol
#784: Print whether
Idis global or local in ppr output#781: Use naming contexts in register names
#1061: Add ‘usedArguments’ to BlackBoxHaskell blackboxes
Fixes issues:
#974: Fix indirect shadowing in
reduceNonRepPrim#964: SaturatingNum instance of
Indexnow behaves correctly when the size of the index overflows anInt.#810: Verilog backend now correctly specifies type of
BitVector 1#811: Improve module load behavior in clashi
#439: Template Haskell splices and TopEntity annotations can now be used in clashi
#662: Clash will now constant specialize partially constant constructs
#700: Check work content of expression in cast before warning users. Should eliminate a lot of (superfluous) warnings about “specializing on non work-free cast”s.
#837: Blackboxes will now report clearer error messages if they’re given unexpected arguments.
#869: PLL is no longer duplicated in Blinker.hs example
#749: Clash’s dependencies now all work with GHC 8.8, allowing
clash-{prelude,lib,ghc}to be compiled from Hackage soon.#871: RTree Bundle instance is now properly lazy
#895: VHDL type error when generating
Maybe (Vec 2 (Signed 8), Index 1)#880: Custom bit representations can now be used on product types too
#976: Prevent shadowing in Clash’s core evaluator
#1007: Can’t translate domain tagType.Errors.IfStuck…
#967: Naming registers disconnects their output
#990: Internal shadowing bug results in incorrect HDL
#945: Rewrite rules for Vec Applicative Functor
#919: Clash generating invalid Verilog after Vec operations #919
#996: Ambiguous clock when using
ClearOnResetandresetGentogether#701: Unexpected behaviour with the
Synthesizeannotation#694: Custom bit representation error only with VHDL
#347: topEntity synthesis fails due to insufficient type-level normalisation
#626: Missing Clash.Explicit.Prelude definitions
#960: Blackbox Error Caused by Simple map
#1012: Case-let doesn’t look through ticks
#430: Issue warning when not compiled with
executable-dynamic: True#374: Clash.Sized.Fixed: fromInteger and fromRational don’t saturate correctly
#836: Generate warning when
toIntegerblackbox drops MSBs#1019: Clash breaks on constants defined in terms of
GHC.Natural.gcdNatural#1025:
inlineCleanupwill not produce empty letrecs anymore#1030:
bindConstantVarwill bind (workfree) constructs#1034: Error (10137): object “pllLock” on lhs must have a variable data type
#1046: Don’t confuse term/type namespaces in ‘lookupIdSubst’
#1041: Nested product types incorrectly decomposed into ports
#1058: Prevent substitution warning when using type equalities in top entities
#1033: Fix issue where Clash breaks when using Clock/Reset/Enable in product types in combination with Synthesize annotations
#1075: Removed superfluous constraints on ‘maybeX’ and ‘maybeIsX’
#1085: Suggest exporting topentities if they can’t be found in a module
#1065: Report polymorphic topEntities as errors
#1089: Respect maxBound in Enum instances for BitVector,Index,Signed,Unsigned
Fixes without issue reports:
Fix bug in
rnfXdefined forDown(baef30e)Render numbers inside gensym (bc76f0f)
Report blackbox name when encountering an error in ‘setSym’ (#858)
Fix blackbox issues causing Clash to generate invalid HDL (#865)
Treat types with a zero-width custom bit representation like other zero-width constructs (#874)
TH code for auto deriving bit representations now produces nicer error messages (7190793)
Adds ‘–enable-shared-executables’ for nix builds; this should make Clash run much faster (#894)
Custom bit representations can now mark fields as zero-width without crashing the compiler (#898)
Throw an error if there’s data left to parse after successfully parsing a valid JSON construct (#904)
Data.gfoldlis now manually implemented, in turn fixing issues withgshow(#933)Fix a number of issues with blackbox implementations (#934)
Don’t inline registers with non-constant clock and reset (#998)
Inline let-binders called [dsN | N <- [1..]] (#992)
ClockGens use their name at the Haskell level #827
Render numbers inside gensym #809
Don’t overwrite existing binders when specializing #790
Deshadow in ‘caseCase’ #1067
Deshadow in ‘caseLet’ and ‘nonRepANF’ #1071
Deprecations & removals:
5.21. 1.0.0 September 3rd 2019¶
10x - 50x faster compile times
New features:
API changes: check the migration guide at the end of
Clash.TutorialAll memory elements now have an (implicit) enable line; “Gated” clocks have been removed as the clock wasn’t actually gated, but implemented as an enable line.
Circuit domains are now configurable in:
(old) The clock period
(new) Clock edge on which memory elements latch their inputs (rising edge or falling edge)
(new) Whether the reset port of a memory element is level sensitive asynchronous reset) or edge sensitive (synchronous reset)
(new) Whether the reset port of a memory element is active-high or active-low (negated reset)
(new) Whether memory element power on in a configurable/defined state (common on FPGAs) or in an undefined state (ASICs)
See the blog post on this new feature
Data types can now be given custom bit-representations: http://hackage.haskell.org/package/clash-prelude/docs/Clash-Annotations-BitRepresentation.html
Annotate expressions with attributes that persist in the generated HDL, e.g. synthesis directives: http://hackage.haskell.org/package/clash-prelude/docs/Clash-Annotations-SynthesisAttributes.html
Control (System)Verilog module instance, and VHDL entity instantiation names in generated code: http://hackage.haskell.org/package/clash-prelude/docs/Clash-Magic.html
Much improved infrastructure for handling of unknown values: defined spine, but unknown leafs: http://hackage.haskell.org/package/clash-prelude/docs/Clash-XException.html#t:NFDataX
Experimental: Multiple hidden clocks. Can be enabled by compiling
clash-preludewith-fmultiple-hiddenExperimental: Limited GADT support (pattern matching on vectors, or custom GADTs as longs as their usage can be statically removed; no support of recursive GADTs)
Experimental: Use regular Haskell functions to generate HDL black boxes for primitives (in an addition to existing string templates for HDL black boxes) See for example: http://hackage.haskell.org/package/clash-lib/docs/Clash-Primitives-Intel-ClockGen.html
Fixes issues:
5.22. 0.99.3 July 28th 2018¶
Fixes bugs:
Evaluator recognizes
Bitliterals #329Use existential type-variables in context of GADT pattern match
Do not create zero-bit temporary variables in generated HDL
Use correct arguments in nested primitives #323
Zero-constructor data type needs 0 bits #238
Create empty component when result needs 0 bits
Evaluator performs BigNat arithmetic
Features:
Bundle and BitPack instances up to and including 62-tuples
Handle undefined writes to RAM properly
Handle undefined clock enables properly
5.23. 0.99.1 May 12th 2018¶
Allow
~NAME[N]tag inside~GENSYM[X]Support HDL record selector generation #313
InlinePrimitivesupport: specify HDL primitives inline with Haskell codeSupport for
ghc-typelits-natnormalise-0.6.1Liftinstances forTopEntityandPortNameInlinePrimitivesupport: specify HDL primitives inline with Haskell code
5.24. 0.99 March 31st 2018¶
New features:
Major API overhaul: check the migration guide at the end of
Clash.TutorialNew features:
Explicit clock and reset arguments
Rename
CLaSHtoClashImplicit/
Hiddenclock and reset arguments using a combination ofreflectionandImplicitParams.Large overhaul of
TopEntityannotationsPLL and other clock sources can now be instantiated using regular functions:
Clash.Intel.ClockGenandClash.Xilinx.ClockGen.DDR registers:
Generic/ASIC:
Clash.Explicit.DDRIntel:
Clash.Intel.DDRXilinx:
Clash.Intel.Xilinx
Bitis now anewtypeinstead of atypesynonym and will be mapped to a HDL scalar instead of an array of one (e.gstd_logicinstead ofstd_logic_vector(0 downto 0))Hierarchies with multiple synthesisable boundaries by allowing more than one function in scope to have a
Synthesizeannotation.Local caching of functions with a
Synthesizeannotation
Bittype is mapped to a HDL scalar type (e.g.std_logicin VHDL)Improved name preservation
Zero-bit values are filtered out of the generated HDL
Improved compile-time computation
Many bug fixes
5.25. Older versions¶
Check out:
https://github.com/clash-lang/clash-compiler/blob/3649a2962415ea8ca2d6f7f5e673b4c14de26b4f/clash-prelude/CHANGELOG.md
https://github.com/clash-lang/clash-compiler/blob/3649a2962415ea8ca2d6f7f5e673b4c14de26b4f/clash-lib/CHANGELOG.md
https://github.com/clash-lang/clash-compiler/blob/3649a2962415ea8ca2d6f7f5e673b4c14de26b4f/clash-ghc/CHANGELOG.md